Gate Bias Incorporation into Cardiff Behavioural Modelling Formulation

This paper presents a novel approach to incorporate gate bias voltage variations into the Cardiff behavioural model formulation. In particular, it is observed that the model coefficients can be expressed effectively as a linear function of bias voltage. As a result, the intensity of the load-pull measurement can decrease up to 80 % as the interpolation of the data with respect to the gate bias voltage can be exploited. The experiment was done on a 4 W GaN technology on-wafer device and the result is verified on 0.2 W GaAs technology device.