A 90–98GHz 2×2 Phased-Array Transmitter with High Resolution Phase Control and Digital Gain Compensation

In this paper, a 90–98 GHz 2×2 phased-array transmitter with 9-bit phase control and 6-bit gain compensation is proposed. Each channel of the proposed phased-array transmitter consists of a vector-sum phase shifter and a digital assisted variable-gain power amplifier (DVGPA). The current source array (CSA) is introduced to implement such DVGPA. Meanwhile, the gain of DVGPA could be finely adjusted in a specific range with a small phase variation, which could minimize the gain error of the whole system. The proposed phased-array transmitter implemented in 40-nm CMOS technology achieves 6.3–8.13 dBm saturated output power and gain >9 dB for single channel. The RMS phase and gain errors with compensation are less than 1.82° and 1.12 dB, respectively. The chip size is 2.5 mm × 1.1 mm including all pads.