A Full-Duplex Transceiver with CMOS RF Circulation and Code-Domain Signal Processing for 104 dB Self-Interference Rejection and Watt Level TX Power Handling
This paper describes a full-duplex (FD) radio transceiver that uses CMOS RFICs to realize high power handling and linearity. A high-rejection, magnetic-less CMOS circulator at the antenna along with high-rejection, blocker-tolerant RF code-domain correlators achieve high transmitter (TX) rejection in the RF domain. Code-domain operation supports higher linearity in FD applications. Digital cancellation increases the rejection down to noise floor of a software-defined radio (SDR). We compare the role of antenna impedance in the performance of SI rejection. The measured results demonstrate more than 104-dB TX self-interference (TX-SI) rejection at 20 dBm TX power. To the best of our knowledge, this work presents the best reported TX-SI rejection at more than 20 dBm.