Polylithic Integration for RF/MM-Wave Chiplets using Stitch-Chips: Modeling, Fabrication, and Characterization

A polylithic integration technology is demonstrated for seamless stitching of RF and digital chiplets. In this technology, stitch-chips with compressible microinterconnects (CMIs) are used for low-loss and dense interconnection between chiplets. A test vehicle using fused-silica stitch-chips with integrated CMIs is demonstrated including modeling, fabrication, assembly, and characterization. A 500 µm-long stitch-chip signal link is measured to have less than 0.4 dB insertion loss for up to 30 GHz. A simulated eye diagram for 1000 µm-long stitch-chip signal link has a clear opening at 50 Gbps data rate. Moreover, the S-parameters of CMIs are extracted from this test vehicle and show less than 0.17 dB insertion loss for up to 30 GHz. Benchmarking to silicon interposer based interconnection is also reported.