A Fully-Integrated 2.6GHz Stacked Switching Power Amplifier in 45nm SOI CMOS with >2W Output Power and 43.5% Efficiency

Power generation in scaled silicon technologies is fundamentally challenged by the low breakdown voltage of silicon-based transistors and the low quality of silicon-based passive components. Consequently, sub-6GHz power amplifiers (PAs) typically exploit compound semiconductor technologies and/or external matching networks. In this paper, we explore the limits of modern SOI CMOS technology which offer floating-body devices that enable device stacking to realize high-power devices and a high-resistivity substrate to enable high-quality passive components. A design methodology for a stacked class-E/Fodd switching power amplifier array exploiting transformer-based series-parallel combining is introduced that jointly optimizes the power amplifier and the combiner design. A fully-integrated 45nm SOI CMOS 2.6GHz prototype yields 33.1dBm of output power at 43.5% efficiency. Reliability measurements indicate virtually no degradation in performance over 180 hours of continuous operation. While operated at a lower supply voltage of 2.3V for efficiency optimization, an efficiency of 47.6% is achieved at 31.2dBm output power.