Securing Analog Intellectual Property: Split Manufacturing, PUFs, and Beyond
The globalization of the integrated circuit supply chain has resulted in an increase in untrusted third-parties throughout the circuit design and manufacturing flow. With the global semiconductor industry estimated to have generated $419 billion dollars in revenue in 2017, about $53 billion was contributed from the analog IC market. In addition to analog-only intellectual property (IP), a large number of modern electronic components that are digital must function in a world of continuously varying analog inputs. The complexity of analog circuits leads to not only tedious and costly design but also motivates an adversary to steal or counterfeit analog IP to save time and resources, while additional design considerations for analog ICs result in increased challenges when implementing security features. While there has been a significant amount of research on the security and protection of digital circuit IP, analog circuit security is in a nascent phase, further highlighting the need for increased focus on the topic. Techniques to protect analog intellectual property are mostly overlooked as analog ICs typically have a small footprint and are challenging to design. Design considerations for an analog IC that significantly differ from a digital circuit include 1) greater precision in biasing conditions, 2) greater sensitivity to noise and temperature, 3) greater emphasis on signal integrity, 4) tighter noise margins, and 5) simultaneous consideration of multiple parameters of the design process (whereas digital circuits follow a sequential design flow). These considerations provide both challenges and benefits when securing analog intellectual property. This presentation will provide an overview and comparison of circuit techniques and methodologies that utilize these analog specific design considerations to protect analog intellectual property from theft and reverse engineering. The high level objective is to elicit a discussion on current and future research trends in the area of analog IP protection.