Obfuscation of Analog IPs

Analog Integrated Circuits (ICs) are one of the top targets for counterfeiting. However, the security of analog Intellectual Property (IP) is not well investigated as its digital counterpart. In this talk, we explore the possibility of multi-threshold voltage (VTH) design to protect the analog IP from Reverse Engineering (RE)-based attacks. Analog circuits are sensitive to VTH as the operating region of a transistor can vary with VTH. Furthermore, the VTH of individual transistors cannot be identified during the RE process. The trial-and-error based technique to guess the VTH and validate with a golden IC will ramp up RE effort exponentially. Thus, by carefully including multi-VTH transistors, the designer can ensure that the properties of analog IP e.g., gain, bandwidth, and linearity are protected even though the physical dimensions of the transistors are revealed. We demonstrate this technique by using a case study on a wide-swing cascode amplifier. We show that the reverse engineering effort can be ~1013 years. We propose a technique like transistor splitting to increase the effort even more. Mismatch analysis shows that the proposed technique results in only 1% loss in mean robustness.